1/10 april 2001 n high speed: t pd = 5ns (typ.) at v cc =5v n low power dissipation: i cc =4 m a(max.) at t a =25 c n compatible with ttl outputs v ih = 2v (min.), v il = 0.8v (max.) n 50 w transmission line driving capability n symmetrical output impedance: |i oh |=i ol = 24ma (min) n balanced propagation delays: t plh @ t phl n operating voltage range: v cc (opr) = 4.5v to 5.5v n pin and function compatible with 74 series 138 n improved latch-up immunity description the 74act138 is an advanced high-speed cmos 3 to 8 line decoder (inverting) fabricated with sub-micron silicon gate and double-layer metal wiring c 2 mos tecnology. if the device is enabled, 3 binary select inputs (a, b, and c) determine which one of the outputs will go low. if enable input g1 is held low or either g2a or g2b is held high, the decoding function is inhibited and all the 8 outputs go to high. three enable inputs are provided to ease cascade connection and application of address decoders for memory systems. the device is designed to interface directly high speed cmos systems with ttl, nmos and cmos output voltage levels. all inputs and outputs are equipped with protection circuits against static discharge, giving them 2kv esd immunity and transient excess voltage. 74act138 3 to 8 line decoder (inverting) pin connection and iec logic symbols order codes package tube t & r dip 74act138b sop 74act138m 74ACT138MTR tssop 74act138ttr tssop dip sop
74act138 2/10 input and output equivalent circuit pin description truth table x : don't care logic diagram this logic diagram has not be used to estimate propagation delays pin no symbol name and function 1, 2, 3 a, b, c address inputs 4, 5 g2a, g2b enable inputs 6 g1 enable input 15, 14, 13, 12, 11, 10, 9, 7 y0 to y7 outputs 8 gnd ground (0v) 16 v cc positive supply voltage inputs outputs enable select g2b g2a g1 c b a y0 y1 y2 y3 y4 y5 y6 y7 xxl xxxhhhhhhhh xhxxxxhhhhhhhh hxxxxxhhhhhhhh l lhl l l lhhhhhhh l lhl lhhlhhhhhh l lhlhlhhlhhhhh l lh lhhhhh lhhhh l lhhl l hhhhl hhh l lhhlhhhhhh lhh l lhhhl hhhhhhl h l lhhhhhhhhhhh l
74act138 3/10 absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. recommended operating conditions 1) v in from 0.8v to 2.0v symbol parameter value unit v cc supply voltage -0.5 to +7 v v i dc input voltage -0.5 to v cc + 0.5 v v o dc output voltage -0.5 to v cc + 0.5 v i ik dc input diode current 20 ma i ok dc output diode current 20 ma i o dc output current 50 ma i cc or i gnd dc v cc or ground current 400 ma t stg storage temperature -65 to +150 c t l lead temperature (10 sec) 300 c symbol parameter value unit v cc supply voltage 4.5 to 5.5 v v i input voltage 0 to v cc v v o output voltage 0 to v cc v t op operating temperature -55 to 125 c dt/dv input rise and fall time v cc = 4.5 to 5.5v (note 1) 8 ns/v
74act138 4/10 dc specifications 1) maximum test duration 2ms, one output loaded at time 2) incident wave switching is guaranteed on transmission lines with impedances as low as 50 w ac electrical characteristics (c l = 50 pf, r l = 500 w, input t r =t f = 3ns) (*) voltage range is 5.0v 0.5v symbol parameter test condition value unit v cc (v) t a =25 c -40 to 85 c -55 to 125 c min. typ. max. min. max. min. max. v ih high level input voltage 4.5 v o = 0.1 v or v cc -0.1v 2.0 1.5 2.0 2.0 v 5.5 2.0 1.5 2.0 2.0 v il low level input voltage 4.5 v o = 0.1 v or v cc -0.1v 1.5 0.8 0.8 0.8 5.5 1.5 0.8 0.8 0.8 v v oh high level output voltage 4.5 i o =-50 m a 4.4 4.49 4.4 4.4 5.5 i o =-50 m a 5.4 5.49 5.4 5.4 4.5 i o =-24 ma 3.86 3.76 3.7 v 5.5 i o =-24 ma 4.86 4.76 4.7 v ol low level output voltage 4.5 i o =50 m a 0.001 0.1 0.1 0.1 5.5 i o =50 m a 0.001 0.1 0.1 0.1 4.5 i o =24 ma 0.36 0.44 0.5 5.5 i o =24 ma 0.36 0.44 0.5 i i input leakage cur- rent 5.5 v i =v cc or gnd 0.1 1 1 m a i cct max i cc /input 5.5 v i =v cc - 2.1v 0.6 1.5 1.6 ma i cc quiescent supply current 5.5 v i =v cc or gnd 44080 m a i old dynamic output current (note 1, 2) 5.5 v old = 1.65 v max 75 50 ma i ohd v ohd = 3.85 v min -75 -50 ma symbol parameter test condition value unit v cc (v) t a =25 c -40 to 85 c -55 to 125 c min. typ. max. min. max. min. max. t plh t phl propagation delay time a, b, c to y 5.0 (*) 5.0 9.0 10.0 10.5 ns t plh t phl propagation delay time g1 to y 5.0 (*) 5.0 8.0 9.0 9.5 ns t plh t phl propagation delay time g2a or g2b to y 5.0 (*) 5.5 8.5 10.0 10.5 ns
74act138 5/10 capacitive characteristics 1) c pd is defined as the value of the ic's internal equivalent capacitance which is calculated from the operating current consumption without load. (refer to test circuit). average operating current can be obtained by the following equation. i cc(opr) =c pd xv cc xf in +i cc /n (per circuit) test circuit c l = 50pf or equivalent (includes jig and probe capacitance) r l =r 1 = 500 w or equivalent r t =z out of pulse generator (typically 50 w ) waveform 1: propagation delays for inverting outputs (f=1mhz; 50% duty cycle) symbol parameter test condition value unit v cc (v) t a =25 c -40 to 85 c -55 to 125 c min. typ. max. min. max. min. max. c in input capacitance 5.0 4 pf c pd power dissipation capacitance (note 1) 5.0 f in = 10mhz 60 pf
74act138 6/10 waveform 2:propagation delaysfor non-invertingoutputs (f=1mhz;50% duty cycle)
74act138 7/10 dim. mm inch min. typ. max. min. typ. max. a1 0.51 0.020 b 0.77 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 d 20 0.787 e 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 f 7.1 0.280 i 5.1 0.201 l 3.3 0.130 z 1.27 0.050 p001c plastic dip-16 (0.25) mechanical data
74act138 8/10 dim. mm inch min. typ. max. min. typ. max. a 1.75 0.068 a1 0.1 0.2 0.004 0.007 a2 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 c 0.5 0.019 c1 45 (typ.) d 9.8 10 0.385 0.393 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 f 3.8 4.0 0.149 0.157 g 4.6 5.3 0.181 0.208 l 0.5 1.27 0.019 0.050 m 0.62 0.024 s 8 (max.) p013h so-16 mechanical data
74act138 9/10 dim. mm inch min. typ. max. min. typ. max. a 1.1 0.433 a1 0.05 0.10 0.15 0.002 0.004 0.006 a2 0.85 0.9 0.95 0.335 0.354 0.374 b 0.19 0.30 0.0075 0.0118 c 0.09 0.20 0.0035 0.0079 d 4.9 5 5.1 0.193 0.197 0.201 e 6.25 6.4 6.5 0.246 0.252 0.256 e1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 bsc 0.0256 bsc k0 o 4 o 8 o 0 o 4 o 8 o l 0.50 0.60 0.70 0.020 0.024 0.028 c e b a2 a e1 d 1 pin 1 identification a1 l k e tssop16 mechanical data
74act138 10/10 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringe ment of patents or other righ ts of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this pub lication are subject to change without notice. thi s pub lication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authori zed for use as critical components in life suppo rt devices or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2001 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco singapore - spain - sweden - swit zerland - united kingdom ? http://w ww.st.com
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